Factors affecting Escape Routing are:
- Ball pitch,
- Land diameter
- Number of I/O pins
- Via type
- Pad size
- Decoupling capacitor placement
- Trace width/spacing,
- The number of layers required to escape the BGA.
The top three factors are device specific. Manufacturers have detailed datasheets for their devices that provide recommended land diameters for both masked and unmasked lands. BGA pin assignment and pin grouping can also be modified to enable efficient routing of the board with an optimum number of required board layers.
The figure below is an example of high-speed Serdes II at 18 GHz signal routing from the outer periphery of the BGA on an external layer.